Conventionally, semiconductor memories such as static random access memory (“SRAM”) and dynamic random access memory (“DRAM”) are in widespread use. DRAM is very common due to its high density with a cell size typically between 6F2 and 8F2, where F is a minimum feature size, namely one half of the smallest pitch in an existing technology. However, DRAM is relatively slow having an access time commonly near 50 nanoseconds (“ns”). SRAM access time is typically an order of magnitude faster than DRAM. However, an SRAM cell is commonly made of four transistors and two resistors or of six transistors, thus leading to a cell size of approximately 60F2 to 100F2.
SRAM memory designs based on a negative differential resistance cell, such as a thyristor-based memory cell, have been introduced to minimize the size of a conventional SRAM memory. A thyristor-based memory may be effective in memory applications. A capacitively coupled thyristor of a thyristor-based memory operates in a range from a lower to an upper operating voltage. A workfunction of a gate, such as a control gate of the thyristor of a thyristor-based memory, may be modified by ion implantation. A material or materials, such as Germanium, Boron, or Phosphorous, or a combination thereof, may be implanted into the thyristor control gate to adjust its workfunction.
Heretofore, a thyristor-based memory had a standby voltage or a read voltage between about −3V and −1V, as mentioned in U.S. Pat. No. 6,690,039 B1. However, as is well known, a charge pump used to pump voltage down to a negative voltage consumes more power than using positive voltages, such as “off-chip” provided positive voltages, for operation of a thyristor-based memory. Thus, power consumption may be reduced if a standby voltage for a thyristor-based memory were less negative or more positive than approximately −1 V. This is because it takes more energy to pump voltage to a level outside the range of voltages provided by the “off-chip” voltage supplies (e.g., a negative voltage level) than to supply a voltage level which falls within the range of voltages provided by the “off-chip” voltage supplies.
To appreciate why power consumption may be reduced if standby voltage were increased in a positive direction, operation of a thyristor-based memory cell should be understood with respect to writing a logic zero (“write-zero operation”). For a write-zero operation, a positive voltage at a write voltage level is applied to a control gate of such thyristor-based memory device. The control gate is coupled to a wordline (“WL2”) of the thyristor-based memory. After which, a standby voltage (“VStandby_WL2”) is applied to WL2 to effect the storing of a logic zero in the thyristor-based memory cell. The falling edge transition to VStandby_WL2 causes minority carriers to be driven out of a base region of the thyristor-based memory device. Heretofore, this meant providing a swing from about +1V to about −2V to drive out enough minority carriers to sufficiently clear minority carriers from the base region to help maintain a reverse biased or current blocking state. Thus, the amount of voltage swing or operating voltage range on a falling edge transition for the control gate over a p-type body from a positive voltage for the write-zero operation followed by application of a negative standby voltage VStandby_WL2 is directly proportional to the amount of power consumed. More particularly, by reducing the amount of negative voltage swing within the falling edge transition, the amount of power consumed may be reduced where the capacitor coupling ratio is unchanged. In other words, charge pump efficiency may be effectively enhanced by moving VStandby_WL2 closer to the lowest external power level supplied, such as 0 volts.
Accordingly, in instances it would be desirable to modify the thyristor-based memory cell to drive out a sufficient number of minority carriers from a base for a standby state that reduces the amount of negative voltage swing between a WL2 write voltage and a WL2 standby voltage. Moreover, the closer VStandby_WL2 is to zero volts, the less power consumed in the generation of VStandby_WL2.
However, in other instances, negative voltage swing may not be reduced. In those instances, materials other than those previously used may be integrated into a control gate to achieve a useful workfunction with or without having to implant into the control gate.